Power and Performance Engineer

THE ROLE:Technical, hands-on engineer responsible for Datacenter GPU power management feature validation, feature enablement at the silicon GPU level up through BIOS/system firmware/OS levels, and feature optimization towards power and performanceKEY RESPONSIBILITIES:Interface silicon, power architect, firmware and platform team to close power management feature evaluation in pre-silicon phaseDevelop and execute feature enablement and validation test plans for power management features during emulation and post silicon phase across all AMD Server GPU productsDevelop post-silicon validation infrastructure (software, hardware, automation environment, and lab setup)Drive post-silicon debug efforts to identify root cause and resolution of AMD's newest Server GPUDrive post silicon power management feature optimization toward performance targetWork with cross-functional teams internally and externally to improve post-silicon validation test strategy, methodology, and processLeading collaborative technical discussions to drive resolution on technical issues and roll out technical initiativesBe able to work in a high demand, fast paced environment with lots of real-time problem solving and critical thinkingPREFERRED EXPERIENCE:Knowledge of computer hardware architecture (CPU/APU, GPU, x86, pcie, memory, bus logic) and software architecture (driver, bios, firmware usage)Knowledge of power management features, Vmin voltage bounding box, power and performanceUnderstanding of modern x86 microprocessor architecture and Server GPU platform architecture is highly desiredExperience developing validation methodologies and infrastructureTest plan and test development experienceParticipated in silicon bring up and debug, support to internal engineering teamsAble to execute and drive success of programs with multiple projects on the goDebug skills at both GPU and system levelFamiliarity with programming / scripting language (C/C++, Python, Perl, ...)Working knowledge of Server OSes (Linux, Windows Server)Must be a self-starting team player with excellent communication skills who can work with minimal guidanceForward thinker that drives improvement to development process, code architecture and fosters a spirit of innovation and continuous improvementStrong verbal and written English communication skillsWorking knowledge of lab equipment such as oscilloscopes, logic analyzers and protocol analyzersSelf-organizing and the ability multitask based on prioritiesACADEMIC CREDENTIALS:Bachelor’s degree or higher in Electrical/Computer Engineering or Electronics / Computer Science related with a minimum 1-5 years of experience in SoC validation and debug.